MIPS Technologies Updates Processor IP Lineup with Aptiv Seriesby Ganesh T S on May 10, 2012 8:55 AM EST
ARM has been making waves over the past two years with plenty of processor and graphics IP announcements, but they are not alone in the game. MIPS Technologies, almost as old as ARM itself, also licenses RISC processors. With licensees like Broadcom and Sigma Designs, they have undoubtedly held the upper hand in the home entertainment / set-top-box arena as well as the networking space. However, success in the fast-growing mobile / tablet space has been hard for MIPS to come by, thanks to ARM being well-entrenched in that market.
Today, MIPS is introducing a range of new processor IP cores in the Aptiv lineup, similar to ARM's Cortex. The members of this lineup range from small microcontroller cores to triple dispatch superscalar ones. By introducing a member at each performance level to compete directly with offerings from ARM, MIPS has made its move in the processor IP battle.
MIPS last introduced a new processor IP core back in September 2010, the MIPS 1074K Coherent Processing System. Between September 2010 and now, ARM officially announced the Cortex-A15 (well after TI had announced an SoC based on it) and Cortex-A7. In the preceding year, the Cortex-A5 and the Cortex-M4 had been launched. The Aptiv series from MIPS introduces members which compete against each of these offerings.
Throughout the briefing, MIPS stressed that the standard DMIPS/MHz/core was not a reliable benchmark. Instead, they promoted CoreMark in which their cores performed better than ARM's offerings. CoreMark is comprised of small and easy to understand ANSI C code with a realistic mixture of read/write operations, integer operations, and control operations. CoreMark has a total binary size of no more then 16K using gcc on an x86 machine (this small size makes it more convenient to run using simulation tools). We do agree with MIPS that it could be a better measure of L1 cache and branch prediction performance. Unfortunately, we don't have reliable CoreMark data for the upcoming Cortex-A15, and hence, will be using DMIPS/MHz/core as a rough performance comparison metric in the rest of the piece.
The Aptiv series being launched today consists of three families, the proAptiv, interAptiv and microAptiv. While proAptiv and interAptiv come in multi-core variants (with up to 6 for the former and 4 for the latter), the microAptiv family members are all single core.
The following tables presents the various MIPS and ARM processor IP cores available for licensing in order of their performance. Note that multiple generations of processors are presented in the table. The Cortex-A,R & M series cater to the application processor segment, real-time processing segment and the microcontroller segment respectively. They are matched field for field by the proAptiv, interAptiv and microAptiv series being launched by MIPS today.
|MIPS and ARM High End IP Cores in Order of Performance|
In terms of processor IP cores catering to real-time applications where high reliability (such as ECC support for the internal caches) and low power footprint is also required, the interAptiv family and the Cortex-R series go head to head. That said, MIPS also targets interAptiv family members as alternatives for Cortex-A5 / A7 / A9. However, the target market for the Cortex-R series and interAptiv series are similar (wireless baseband / automotive applications such as safety and powertrain control etc.)
|MIPS and ARM Mid-Range IP Cores in Order of Performance|
In the microcontroller class processor IP cores, the microAptiv series is pitted against the Cortex-M series.
|MIPS and ARM Microcontroller Class IP Cores in Order of Performance|
|1.25||Cortex-M3 / Cortex-M4|
In the next few sections, we will look at the architectural details of the newly introduced processors.