Intel’s 10th Gen Comet Lake for Desktops: Skylake-S Hits 10 Cores and 5.3 GHzby Dr. Ian Cutress on April 30, 2020 9:00 AM EST
Socket, Silicon and Security
The new CPUs have the LGA1200 socket, which means that current 300-series motherboards are not sufficient, and users will require new LGA1200 motherboards. This is despite the socket being the same size. Also as part of the launch, Intel provided us with a die shot:
It looks very much like an elongated Comet Lake chip, which it is. Intel have added two cores and extended the communication ring between the cores. This should have a negligible effect on core-to-core latency which will likely not be noticed by end-users. The die size for this chip should be in the region of ~200 mm2, based on previous extensions of the standard quad core die:
- CFL 4C die: 126.0 mm2
- CFL 6C die: 149.6 mm2
- CFL 8C die: 174.0 mm2
- CML 10C die: ~198.4 mm2
The only silicon we know to be guaranteed inside each retail box is that the ten core parts have to have the 10C silicon. Beyond that, Intel could make any of the eight core Core i7 parts use either a native 8C silicon, or 10C silicon with two disabled cores. Similarly, the six core Core i5 could either be native 6C silicon, harvested 8C silicon, or harvested 10C silicon. We have reached out to Intel for clarification, given that in previous generations Intel sometimes offered different TDP values for the harvested dies. There's even a possibility that Intel could be reusing the same Coffee Lake silicon masks and just binning them to Comet Lake specifications.
For security, Intel is applying the same modifications it had made to Coffee Lake, matching up with the Cascade Lake and Whiskey Lake designs.
|Spectre and Meltdown on Intel|
|Spectre||Variant 1||Bounds Check Bypass||OS/VMM||OS/VMM||OS/VMM||OS/VMM|
|Spectre||Variant 2||Branch Target Injection||Firmware + OS||Firmware + OS||Hardware + OS||Firmware + OS|
|Meltdown||Variant 3||Rogue Data Cache Load||Hardware||Hardware||Hardware||Hardware|
|Meltdown||Variant 3a||Rogue System Register Read||MCU*||Firmware||Firmware||Firmware|
|Variant 4||Speculative Store Bypass||Hardware + OS||Firmware + OS||Firmware + OS||Firmware + OS|
|Variant 5||L1 Terminal Fault||Hardware||Hardware||Hardware||Hardware|
The fix for V3a has now changed from ‘Firmware’ to ‘MCU’, suggesting that Intel has added a microcontroller as a fix. We have asked Intel for clarification. Intel is now claiming that V4 is fixed through a combination of hardware and OS fixes.
One of the new features that Intel is promoting with the new Comet Lake processors is die thinning – taking layers off of the silicon and in response making the integrated heat spreader thicker in order to enable better thermal transfer between silicon and the cooling. Because modern processors are ‘flip-chips’, the bonding pads are made at the top of the processor during manufacturing, then the chip is flipped onto the substrate. This means that the smallest transistor features are nearest the cooling, however depending on the thickness of the wafer means that there is potential, with polishing to slowly remove silicon from this ‘rear-end’ of the chip.
In this slide, Intel suggests that they apply die thinning to products using STIM, or a soldered thermal interface. During our briefing, Intel didn’t mention if all the new processors use STIM, or just the overclockable ones, and neither did Intel state if die thinning was used on non-STIM products. We did ask how much the die is thinned by, however the presenter misunderstood the question as one of volume (?). We’re waiting on a clearer answer.
Overclocking Tools and Overclocking Warranties
For this generation, Intel is set to offer several new overclocking features.
First up is allowing users to enable/disable hyperthreading on a per-core basis, rather than a whole processor binary selection. As a result, users with 10 cores could disable HT on half the cores, for whatever reason. This is an interesting exercise mostly aimed at extreme overclockers that might have single cores that perform better than others, and want to disable HT on that specific core.
That being said, an open question exists as to whether the operating system is set up to identify if individual cores have hyperthreads or not. Traditionally Windows can determine if a whole chip has HT or not, but we will be interested to see if it can determine which of my threads on a 10C/15T setup are hyperthreads or not.
Also for overclocking, Intel has enabled in the specification new segmentation and timers to allow users to overclock both the PCIe bus between CPU and add-in cards as well as the DMI bus between the CPU and the chipset. This isn’t strictly speaking new – when processors were driven by FSB, this was a common element to that, plus the early Sandy Bridge/Ivy Bridge core designs allowed for a base frequency adjustment that also affected PCIe and DMI. This time around however, Intel has separated the PCIe and DMI base frequencies from everything else, allowing users to potentially get a few more MHz from their CPU-to-chipset or CPU-to-GPU link.
The final element is to do with voltage/frequency curves. Through Intel’s eXtreme Tuning Utility (XTU) and other third party software that uses the XTU SDK, users can adjust the voltage/frequency curve for their unlocked processor to better respond to requests for performance. For users wanting a lower idle power, then the voltage during idle can be dropped for different multiplier offsets. The same thing as the CPU ramps up to higher speeds.
It will be interesting to see the different default VF curves that Intel is using, in case they are per-processor, per-batch, or just generic depending on the model number. Note that the users also have to be mindful of different levels of stability when the CPU goes between different frequency states, which makes it a lot more complicated than just a peak or all-core overclock.
On the subject of overclocking warranties, even though Intel promotes the use of overclocking, it isn’t covered by the standard warranty. (Note that motherboard manufacturers can ignore the turbo recommendations from Intel and the user is still technically covered by warranty, unless the motherboard does a technical overclock on frequency.) Users who want to overclock and obtain a warranty can go for Intel’s Processor Protection Plans, which will still be available.
Motherboards, Z490, and PCIe 4.0 ??
Due to the use of the new socket, Intel is also launching a range of new motherboard chipsets, including Z490, B460, and H470. We have a separate article specifically on those, and there are a small number of changes compared to the 300 series.
The two key features that Intel is promoting to users is support for Intel’s new 2.5 GbE controller, the I225-V, in order to drive 2.5 gigabit Ethernet adoption. It still requires the motherboard manufacturer to purchase the chip and put it on the board, and recent events might make that less likely – recent news confirmed by Intel has stated that the first generation of the I225 silicon is not up to specification, and certain connections might not offer full speed (down 10 Mbps from 2500 Mbps) depending on the end-point. As a result Intel is introducing new B2 stepping silicon later this year, and we suspect all motherboard vendors to adopt this. The other new feature is MAC support for Wi-Fi 6, which can use Intel’s AX201 CNVi RF wireless controllers.
One big thing that users will want to know about is PCIe 4.0. Some of the motherboards being announced today state that they will support PCIe 4.0 with future generations of Intel products. At present Comet Lake is PCIe 3.0 only, however the motherboard vendors have essentially confirmed that Intel’s next generation desktop product, Rocket Lake, will have some form of PCIe 4.0 support.
Now it should be stated that for the motherboards that do support PCIe 4.0, they only support it on the PCIe slots and some (very few) on the first M.2 storage slot. This is because the motherboard vendors have had to add in PCIe 4.0 timers, drivers, and redrivers in order to enable future support. The extra cost of this hardware, along with the extra engineering/low loss PCB, means on average an extra $10 cost to the end-user for this feature that they cannot use yet. The motherboard vendors have told us that their designs conform to PCIe 4.0 specifications, but until Intel starts distributing samples of Rocket Lake CPUs, they cannot validate it except to the strict specification. (This also means that Intel has not distributed early Rocket Lake silicon to the MB vendors yet.)
So purchasing a Z490 motherboard with PCIe 4.0 costs users more money, and they cannot use it at this time. It essentially means that the user is committing to upgrading to Rocket Lake in the future. Personally I would have preferred it if vendors made the current Z490 motherboards be the best Comet Lake variants they could be, and then with a future chipset (Z590?), make those the best Rocket Lake variants they could be. We will see how this plays out, given that some MB vendors are not being completely open with their PCIe 4.0 designs.