During AMD's Computex 2024 kick-off keynote, AMD's CEO, Dr. Lisa Su, officially unveiled and announced the company's next generation of Ryzen processors. Today marks the first unveiling of AMD's highly anticipated Zen 5 microarchitecture via the Ryzen 9000 series, which is set to bring several advancements over Zen 4 and the Ryzen 7000 series for desktop PCs, which will launch sometime in July 2024.

AMD has unveiled four new chip SKUs using its Zen 5 microarchitecture. The AMD Ryzen 9 9950X processor will be the new consumer flagship part, featuring 16 CPU cores and a speedy 5.7 GHz maximum boost frequency. The other SKUs include, 6, 8, and 12 core parts, giving users a varied combination of core and thread counts. All four of these initial chips will be X-series chips, meaning they will have an unlocked multipliers and higher TDPs/clockspeeds.

In regards to performance, AMD is touting an average (geomean) IPC increase in desktop workloads for Zen 5 of 16%. And with the new desktop Ryzen chips' turbo clockspeeds remaining largely identical to their Ryzen 7000 predecessors, this should translate into similar performance expectations for the new chips.

The AMD Ryzen 9000 series will also launch on the AM5 socket, which debuted with AMD's Ryzen 7000 series and marks AMD's commitment to socket/platform longevity. Along with the Ryzen 9000 series will come a pair of new high-performance chipsets: the X870E (Extreme) and the regular X870 chipsets. The fundamental features that vendors will integrate into their specific motherboards remain tight-lipped. Still, we do know that USB 4.0 ports are standard on the X870E/X870 boards, along with PCIe 5.0 for both PCIe graphics and NVMe storage, with higher AMD EXPO memory profile support expected than previous generations.

AMD Ryzen 9000: Bringing Up to 16C/32T of Zen 5 to Desktop

Zen 5 is AMD's latest advancement in Ryzen microarchitecture. While AMD hasn't disclosed many technical details, we know some of the brand-new features that Zen 5 will offer.

AMD Desktop CPU Generations
AnandTech Ryzen 9000
(Granite Ridge)
Ryzen 7000
(Raphael)
Ryzen 5000
(Vermeer)
CPU Architecture Zen 5 Zen 4 Zen 3
CPU Cores Up to 16C / 32T Up To 16C / 32T Up To 16C / 32T
GPU Architecture RDNA2 RDNA2 N/A
GPU Cores 2 2 N/A
Memory DDR5-5600 DDR5-5200 DDR4-3200
Platform AM5 AM5 AM4
CPU PCIe Lanes 24x PCIe 5.0 24x PCIe 5.0 24x PCIe 4.0
Manufacturing Process CCD: TSMC N4
IOD:TSMC N6
CCD: TSMC N5
IOD: TSMC N6
CCD: TSMC N7
IOD: GloFo 12nm

Looking at architectural differences between the last couple of generations (Zen 4 and Zen 3) and Zen 5, we know that AMD uses a new manufacturing process for its Ryzen 9000 desktop chips. While many have touted and speculated that Zen 5 for desktops will be built on one of TSMC's N3 (3 nm) nodes, some of our sources are saying that the Zen 5 CCD will be fabbed on TSMC N4 – though we are awaiting official confirmation about this (Update: And TSMC 4nm is now confirmed for the consumer Ryzen CCD). Furthermore, AMD's mobile counterpart offering, the Ryzen AI 300 series (Strix Point) has been confirmed for 4nm, and we've yet to see an AMD desktop CPU die produced on a more advanced node than its mobile counterpart.

While AMD is not offering a deep dive into the Zen 5 architecture at Computex, the company did touch upon a few of the major architectural improvements over Zen 4 that will be coming with the new CPU architecture. These start with an improved branch predictor, which is designed to offer better accuracy, efficiency, and reduced overall latency of instruction cycles. The Zen 5 architecture also boasts higher throughput with wider pipelines and SIMDs, allowing for faster data processing and equating to better overall performance in benchmarks such as CineBench and Blender and workloads leveraging the AVX-512 instruction set.

Additionally, Zen 5 introduces a deeper out-of-order instruction window size across its design, enabling more parallelism and better handling of multiple instructions within the pipeline simultaneously.

There are also a couple of points within the Zen 5 architecture where AMD has doubled up on resources or performance. L2 to L1 memory bandwidth is one such example, giving the cache hierarchy a big bandwidth boost that should allow for faster data transfers within the individual CPU cores. AMD also claims better AI performance in inferencing and AVX-512 workloads. Notably, AMD's AVX-512 support on Zen 4 was executed using a 256-bit SIMD over 2 cycles, so this may be a sign that AMD has expanded their AVX-512 SIMDs to a full 512-bits wide in the Zen 5 architecture. (Update: This has since been confirmed by AMD. Zen 5 now has a full 512-bit wide SIMD for processing AVX-512 instructions)

These enhancements collectively aim to deliver significant performance gains over the previous Zen 4 microarchitecture, with AMD touting an average (geomean) 16% IPC uplift over Zen 4 in desktop workloads. It should be noted, however, that the top result in this benchmark collection is in the GeekBench 5.3 AES XTS benchmark, which leverages the VAES512 and VAES256 extensions of the AVX-512 instruction set. So AMD's AVX-512 SIMD changes greatly impact that benchmark in particular (though not exclusively).

Above is a render of a Ryzen 9000 series chip with two core complex dies (CCDs), which depicts the silicon's composition and layout. As with previous generations of Ryzen processors, there's a large central I/O die (IOD), through which all I/O and memory operations are routed. As for the CCDs, each die once again contains 8 CPU cores, with AMD equipping Ryzen chips with either 1 or 2 CCDs depending on the SKU. The new Zen 5 CCDs are being fabbed on one of TSMC's 4nm processes (AMD hasn't confirmed which flavor), which is a modest shrink from the N5 process used for Zen 4 CCDs.

Meanwhile, although AMD hasn't confirmed that they're reusing the Ryzen 7000 series IOD here, all signs currently point to the Ryzen 9000 IOD being similar or identical to it. In particular, it is fabbed on the same TSMC N6 process, with the same 2 RDNA graphics CUs, and it offers the exact same off-chip I/O capabilities (though the latter is admittedly also dictated by the AM5 socket).

AMD's Ryzen 9000 chips will also feature similar memory support as their predecessors, with AMD sticking to DDR5. However, AMD does note that the incoming X870E and X870 motherboard chipsets will allow for faster EXPO memory profiles than seen on Zen 4. As it stands, AMD hasn't disclosed the JEDEC memory specification of the four Ryzen 9000 SKUs that it announced today. However, we expect to find out more before the July 2024 launch of the Ryzen 9000 family. And according to AMD's product pages posted since the keynote, the Ryzen 9000 family will top out at JEDEC DDR5-5600 speeds for in-warranty configurations.

AMD Ryzen 9000 Series Processors
Zen 5 Microarchitecture (Granite Ridge)
AnandTech Cores /
Threads
Base
Freq
Turbo
Freq
L2
Cache
L3
Cache
TDP MSRP
Ryzen 9 9950X 16C / 32T 4.3GHz 5.7GHz 16 MB 64 MB 170 W TBC
Ryzen 9 9900X 12C / 24T 4.4GHz 5.6GHz 12 MB 64 MB 120 W TBC
Ryzen 7 9700X 8C / 16T 3.8GHz 5.5GHz 8 MB 32 MB 65 W TBC
Ryzen 5 9600X 6C / 12T 3.9GHz 5.4GHz 6 MB 32 MB 65 W TBC

The announcement of Zen 5 for desktop by AMD and the impending Ryzen 9000 offers four X-series SKUs at launch, allowing for overclocking and coming with unlocked CPU multipliers. The flagship SKU, the Ryzen 9 9950X, features 16 cores, a max boost clock of up to 5.7 GHz, 80 MB of cache split between 64 MB for the L3 and 16 MB for the L2 (1 MB per core of L2) and a 170 W TDP. The Ryzen 9 9900X offers 12 cores, a max boost clock of up to 5.6 GHz, 64 MB of L3 cache, and a 120 W TDP.

Moving down the Ryzen 9000 stack is the Ryzen 7 9700X, which comes with 8 cores, a max boost clock of up to 5.5 GHz, 32 MB of L3 cache, and a 65W TDP. Finally, the entry-level SKU, the Ryzen 5 9600X, has just 6 cores, a max boost clock of up to 5.4 GHz, 32 MB of L3 cache, and a 65 W TDP.

The next slide denotes the flagship Zen 5 chip. The Ryzen 9 9950X is up against Intel's current 14th Gen Core i9-14900K. In productivity and content creation tasks, the Ryzen 9 9950X shows a 7% improvement in Procyon Office, a 10% increase in Puget Photoshop, and a 21% uplift in Cinebench R24 nT. More notably, it exhibits a 55% performance boost in Handbrake and a 56% increase in Blender.

Interestingly, the gaming data shows marginal gains in some titles, although it highlights more significant uplifts in others. AMD's in-house testing shows that the Ryzen 9 9950X outperforms the Intel Core i9-14900K by 4% in Borderlands 3, 6% in Hitman 3, and 13% in Cyberpunk 2077. Further, it achieves a 16% improvement in F1 2023, a 17% gain in DOTA 2, and a 23% increase in Horizon Zero Dawn.

As we've mentioned, AMD is committed to extending its AM5 socket for longevity, at least much more than other vendors offer with their CPU launches and updates. As such, AMD's Ryzen 9000 series operates on the current AM5 platform. And while Ryzen 9000 is fully backwards compatible with existing 600 series boards, AMD has also readied two new 800 series motherboard chipsets for the launch of Zen 5 on desktops. The X870E (extreme) and X870 chipsets will be featured on numerous new motherboards at launch, and a big part of Computex this week will be the motherboard vendors (most of whom are local Taiwanese firms) showing off their new wares.

AMD has offered just a handful of details about their X870E and X870 chipsets. Of particular note, USB 4.0 support is going to be standard on all X870(E) motherboards, whereas it was optional on X670(E) series boards. X870(E) boards will also feature Wi-Fi 7 support (up from 6E on the 600 series), and at least one PCIe 5.0 NVMe slot continues to be mandatory. AMD also notes that motherboards based on both platforms "feature 44 total PCIe lanes," which would break down as 24 lanes from the CPU, and another 20 lanes coming from the chipset.

AMD AM5 Chipset Comparison
Feature X870E X870 X670E X670 B650E
CPU PCIe (PCIe) 5.0 5.0 5.0 4.0 5.0
CPU PCIe (M.2 Slots) At Least 1 PCIe 5.0 Slot
Total CPU PCIe Lanes 24
Chipset PCIe Lanes (Max) 4.0: 12
3.0: 8
4.0: 8
3.0: 4
4.0: 12
3.0: 8
4.0: 8
3.0: 4
USB4 Mandatory
(Discrete, Consumes 4 Chipset PCie 4.0 Lanes)
Optional
SATA Ports (Max) 8 4 8 8 4
DDR5 Support Quad Channel (128-bit bus)
Wi-Fi Wi-Fi 7 (Discrete) Wi-Fi 6E (Discrete)
CPU Overclocking Support Yes
Memory Overclocking Support Yes
# of Chips 2 1 2 2 1
Silicon ASMedia Promontory 21
Available July 2024 July 2024 Sept. 2022 Sept. 2022 Oct. 2022

For the moment, different AMD resources are in conflict with each other about PCIe 5.0 – or, at least, aren't being very clear about it. According to AMD's AM5 chipset page, both X870 and X870E feature PCie 5.0 for both the CPU NVMe lanes and CPU PEG lanes. However AMD's Compute press release states that X870E is "differentiated with 24 PCIe 5.0 lanes, with 16 lanes dedicated to graphics," implying that the vanilla X870 won't mandate PCIe 5.0 support. We're poking around AMD and the motherboard vendors to find out more.

Looking under the hood, AMD has confirmed that the new chipsets aren't based on new silicon. Instead, the company is using the same ASMedia-produced design as in the X670/B650 chipsets: the Promontory 21 controller. Given that the feature sets of the newer X870E/X870 motherboards are fundamentally similar to those of the X670E/X670 motherboards, aside from using newer external controllers such as Wi-Fi 7, there's apparently little need to change the chipset itself. Though given the lack of significant changes, it does raise the question of why AMD has skipped a generation in its nomenclature (700-series anyone?) and went straight to the 800-series chipset.

The AMD Ryzen 9000 series, including the flagship Ryzen 9 9950X (16C/32T), the Ryzen 9 9900X (12C/24T), the Ryzen 7 9700X (8C/16T), and the entry-level Ryzen 5 9600X (6C/12T) is expected to hit retail channels sometime in July 2024. At the time of writing, AMD is not providing pricing.

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  • mode_13h - Monday, June 3, 2024 - link

    Ugh, you're right. It seems all of ASRockRack's, Supermicro's, and Tyan's AM5 motherboards are no bigger than micro-ATX. I checked an ASUS Prime Pro ATX motherboard that supports ECC memory, but it doesn't include EPYC 4xx4 in the list of supported CPUs.
  • schujj07 - Monday, June 3, 2024 - link

    If you are PCIe slot limited on the 4004 series you would probably be a good candidate for the 8004 series instead. Otherwise from a cost point looking at the 7003 series is another choice.
  • mode_13h - Friday, June 7, 2024 - link

    The AM5 CPUs and higher-end chipsets have enough lanes to easily populate a regular ATX motherboard. Sometimes, you just need one more x4 slot, in which case EPYC or TR would be way overkill.
  • ballsystemlord - Monday, June 3, 2024 - link

    Intel: Cuts AVX-512 support from their CPUs.
    AMD: Improves AVX-512 performance on their CPUs.

    I'm laughing. This is too good!
  • mode_13h - Monday, June 3, 2024 - link

    You missed the part where Intel flipped over the board by replacing AVX-512 with AVX10.
  • schujj07 - Monday, June 3, 2024 - link

    AMD could be using AVX10/512.

    "To begin, let’s break down AVX10.N/M: AVX10 is the new “foundational” SIMD/vector instruction set for x86_64. The “.N” denotes the version of AVX10 as a version modifier, allowing incremental updates. It is important to note, if you support “AVX10.N+3,” you must support all of AVX10.N, N+1 and N+2. In simpler words, users are guaranteed supersets of previous instruction sets.

    What does the “/M” mean? It’s a reference to vector register implementation size of a given AVX10.N version. Specifically, it may be 512-bit, 256-bit, or the topic of this article, 128-bit wide."

    https://chipsandcheese.com/2023/10/11/avx10-128-is...

    Therefore it could be very easy for it to be AVX10 as that includes AVX512 if need be.
  • mode_13h - Monday, June 3, 2024 - link

    > AMD could be using AVX10/512.

    LOL. Don't matter for client workloads, because Intel has telegraphed that they'll only be using 256-bit in client processors. Therefore, software developers using AVX10/512 (which Intel pejoratively terms "legacy") will be only those targeting servers that could run AVX-512, also.

    Now, when AMD does support AVX10, they could revert C-series cores to using a 256-bit wide implementation of AVX-512, just like Zen 4 did, and thereby maintain backwards compatibility without being at a density disadvantage on AVX10/256 relative to Intel.
  • schujj07 - Tuesday, June 4, 2024 - link

    "LOL. Don't matter for client workloads, because Intel has telegraphed that they'll only be using 256-bit in client processors."

    AVX512 is becoming more useful and common on the server side. Since the Zen cores is virtually identical between server/desktop CPUs, it makes sense to keep it on both.
  • mode_13h - Friday, June 7, 2024 - link

    > Since the Zen cores is virtually identical between server/desktop CPUs,
    > it makes sense to keep it on both.

    I'm not saying AMD should remove it. I'm saying that Intel found a way to nullify that advantage by creating FUD for people like game devs around the future of AVX-512 so they don't go and write a bunch of code that runs faster on AMD client processors.

    Eventually, Intel will role out AVX10/256 and that's *just* incompatible enough not to work on AMD CPUs without hardware modifications. And if AMD does implement support for it, depending on how they added AVX-512, half of their vector pipelines might be sitting idle, meanwhile Intel's will be fully utilized.
  • ballsystemlord - Saturday, June 8, 2024 - link

    Oh, no, Intel would never do something like that! (sarcasm)

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