Cache & Memory Hierarchy

Qualcomm has a three level exclusive cache hierarchy in Krait. The lower two levels are private per core, while the third level is shared among all cores. Qualcomm calls these caches L0, L1 and L2.

Each Krait core has an 8KB L0 cache (4KB instruction + 4KB data cache). The L0 cache is direct mapped and accessible in a single cycle. Qualcomm claims an 85% hit rate in this level 0 cache, which helps save power by not firing up the larger L1 cache. The hierarchy is exclusive so L0 data isn't necessarily duplicated in L1.

Each core also has a 32KB L1 cache (16KB instruction + 16KB data). The L1 4-way set associative and can also be accessed in a single cycle. There's no way prediction at work here. With 1 cycle latency to both L0 and L1, the primary advantage here is power.

Krait Cache Architecture
  Size Architecture Frequency
L0 4KB + 4KB Direct Mapped Core
L1 16KB + 16KB 4-way set associative Core
L2 1MB (dual core) or 2MB (quad core) 8-way set associative 1.3GHz max

The L2 cache is shared among all cores. In dual-core designs the L2 cache is sized at 1MB (up from 512KB in Scorpion), while quad-core Krait SoCs will have a 2MB L2. Krait's L2 cache is 8-way set associative.

While the L0 and L1 caches operate at core frequency and are on the same voltage plane as their associated core, the L2 cache is separate. To save power the L2 cache runs at its own frequency (up to 1.3GHz depending on the currently requested performance level). The L2 cache is on its own power plane and can be power gated if necessary.

Although Scorpion featured a dual-channel LPDDR2 memory controller, in a PoP configuration only one channel was available to any stacked DRAM. In order to get access to both 32-bit memory channels the OEM had to implement a DRAM on-package as well as an external DRAM on the PCB. Memory requests could be interleaved between the two DRAM, however Qualcomm seemed to prefer load balancing between the two with CPU/GPU accesses being directed to the lower latency PoP DRAM. Very few OEMs seemed to populate both channels and thus Scorpion based designs were effectively single-channel offerings.

Krait removes this limitation and now OEMs can utilize both memory channels in a PoP configuration (simply put two 32-bit DRAM die on the PoP stack) or in an external configuration. The split PoP/external DRAM organization is no longer supported. This change will hopefully mean we'll see more dual-channel Krait designs than we saw with Scorpion, which will in turn improve performance.

Process Technology and Clock Speeds

Krait will be the world's first smartphone CPU built on a 28nm process. Qualcomm is working with both TSMC and Global Foundries, although TSMC will produce the first chips. Krait will be built, at first, on TSMC's standard 28nm LP process. According to Qualcomm there's less risk associated with TSMC's non-HKMG process. Qualcomm was quick to point out that the entire MSM8960 SoC is built on a 28nm LP process compared to NVIDIA's 40nm LPG design in Kal-El. From Qualcomm's perspective, 40nm G transistors are only useful at reducing leakage at high temperatures but for the majority of the time a homogeneous LP design makes more sense.

Just like Scorpion, Krait places each core on its own voltage plane driven at its own clock frequency. Cores can be clocked independently of one another, which Qualcomm insists gives it a power advantage in many workloads.

The first implementation of Krait will be in a dual-core 1.5GHz MSM8960, however a second revision of the silicon will be introduced next year that increases clock speed to 1.7 - 2.0GHz. Qualcomm claims that at the same 1.05V core voltage, Krait can run at 1.7GHz vs. 1.55GHz for Scorpion. At these two clock speeds and at the same voltage, Qualcomm tells us that Krait consumes 265mW of power vs. 432mW running an undisclosed workload. Although it should be possible to draw more power than Scorpion under load, Krait should hopefully be able to improve overall power efficiency by completing tasks quicker and thus dropping down to idle faster than its predecessor. Smartphone and tablet battery life should remain the same at worst and improve at best, as a result.

Krait Architecture The Adreno 225 GPU
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  • Hunt3rj2 - Saturday, October 22, 2011 - link

    Hopefully Qualcomm amps up their SoC to 2 GHz levels to stay competitive with Cortex A15.

    Qualcomm has a track record of starting strong, but then they just sputter out and can't keep up with the reference ARM Cortex SoCs.
  • SydneyBlue120d - Sunday, October 23, 2011 - link

    Hi, thanks for your great article.
    You may want to add to the list the Samsung Exynos 5250, that should be the A15 version of the Exynos SOC, running ARM Mali-T604 GPU, don't know if single or multicore. Let's hope it will be used in Samsung Galaxy S3 :)
  • ilkhan - Sunday, November 6, 2011 - link

    Any thoughts on when we'll see Krait/Adreno3xx SoCs in the hands of consumers? Holiday 2012 or will it be later than that?
    Holiday 2012 would make it ideal for the next Nexus SoC.
  • shaky153 - Monday, December 12, 2011 - link

    Hey guys, Im a dev from xda forum
    recently new adreno drivers have been tested and improve 3d performance by 50%, so things are looking very good for the new gpu, itll perform much better than current devices
  • french toast - Monday, December 12, 2011 - link

    re shaky153.
    ''Hey guys, Im a dev from xda forum
    recently new adreno drivers have been tested and improve 3d performance by 50%, so things are looking very good for the new gpu, itll perform much better than current devices ''

    Brilliant, so does that mean that the adreno gpus do have a lot of underutilised power as anand attested in this article?... if so will the adreno 220 get much closer to the a5 in benchmarks? (taking into consideration we dont know a5 gpu clocks and 2x tmu's)

    A reply would be appreciated.
  • french toast - Monday, December 12, 2011 - link

    and half the bandwith....
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